Project Oberon System (RV32)

Project Oberon System is the complete operating system, compiler and editor set that Niklaus Wirth and Jurg Gutknecht designed at ETH Zurich. This version migrates it from Oberon-07 to the more common Oberon 90 and builds it with the OP2 compiler's RISC-V (RV32) backend. The repository also carries an emulator of a machine very close to the one Wirth describes in the Project Oberon book, assembled from a stripped-down rv32emu interpreter plus a hand-written implementation of the machine and its peripherals. Wirth's memory map is reproduced 1:1, which is why core modules such as Kernel.Mod, Display.Mod and Input.Mod run unchanged. The 2013 original targeted RISC-5, a processor Wirth designed himself and put on an FPGA board; this port boots the same system on a modern RISC-V toolchain with no hardware involved at all.